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ams datasheet page 1 [v2-03] 2014-jul-31 document feedback AS5050A low power 10-bit magnetic position sensor the AS5050A is a single-chip on-ax is magnetic rotary position sensor with low voltage and low power features. it includes an integrated hall element array, a high resolution adc and a smart power management controller. the angle position, alarm bits and magnetic field information are transmitted over a 3-wire or 4-wire spi interface to the microcontroller. the AS5050A is available in a compact qfn 16-pin 4x4x0.85 mm package and specified over an operating temperature of -40oc to 85oc. ordering information and content guide appear at end of datasheet. key benefits & features the benefits and features of AS5050A, low power 10-bit magnetic position sensor are listed below: figure 1: added value of using AS5050A benefits features precise and reliable absolute angle measurem ent 10-bit absolute angl e position indication very low power consumption 3a current consumption in low power mode high reliability sensing immune to external magnetic stray fields synchronization between microcontroller and sensor interrupt pin displays availability of new data ideal for small and compact designs qfn-16 4x4 package industry-standard interface 3- or 4-wire spi interface general description
page 2 ams datasheet document feedback [v2-03] 2014-jul-31 AS5050A ? general description applications this sensor is optimized for a broad range of demanding applications including: ?servo motor control ? battery operated systems ? robotics block diagram the functional blocks of this sensor are shown below: figure 2: AS5050A block diagram adc AS5050A vdd vss ss/ mosi sck miso analog front-end atan (cordic) agc int/ en_int/ hall sensors low power management vddp wm spi test
ams datasheet page 3 [v2-03] 2014-jul-31 document feedback AS5050A ? pin assignment the AS5050A pin assign ments are shown below. figure 3: pin diagram figure 4: pin description pin assignments (top view): package drawing is not to scale. pin number name type description 1 mosi digital input spi bus data input 2 miso digital output, tri-state buffer spi bus data output 3 sck digital input schmitt trigger spi clock 4 ss/ digital input spi slave select, active low 5 nc - leave unconnected 6 nc 7 nc 8 nc 9 test analog test pin, connect to vss 10 en_int/ digital input enable interrupt, active low pin assignment mosi miso sck ss/ 16 13 14 15 5 8 7 6 1 4 3 2 12 9 10 11 vdd vddp en_int/ test nc nc nc nc nc vss wm int/ epad
page 4 ams datasheet document feedback [v2-03] 2014-jul-31 AS5050A ? pin assignment 11 vddp supply peripheral power supply, 1.8v to vdd 12 vdd analog and digital power supply, 3.0v to 3.6v 13 vss ground 14 wm digital i/o low: 3-wire mode high: 4-wire mode 15 int/ digital output, tri-state buffer interrupt output. active low, when conversion is finished 16 nc - leave unconnected epad - - exposed pad, leave unconnected pin number name type description
ams datasheet page 5 [v2-03] 2014-jul-31 document feedback AS5050A ? absolute maximum ratings stresses beyond those listed in absolute maximum ratings on page 5 may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in electrical characteristics on page 6 is not implied. exposure to absolute maximum rating cond itions for peri ods may affect device reliability. figure 5: absolute maximum ratings symbol parameter min max units comments electrical parameters vdd dc supply voltage -0.3 5.0 v vddp peripheral supply voltage -0.3 vdd+0.3 v v in input pin voltage -0.3 5.0 v i scr input current (latchup immunity) -100 100 ma norm: jedec 78 electrostatic discharge esd electrostatic discharge 1 - kv norm: mil-std-883 e method 3015 continuous power dissipation ja package thermal resistance - 33.5 c/w velocity=0, multi layer pcb; jedec standard testboard p t total power dissipation 36 mw temperature ranges and storage conditions t strg storage temperature -55 125 c t body package body temperature 260 c the reflow peak soldering temperature (body temperature) specified is in accordance with ipc/jedec j-std-020 moisture/reflow sensitivity classification for non-hermetic solid state surface mount devices. the lead finish for pb-free leaded packages is matte tin (100% sn). humidity non-condensing 5 85 % msl moisture sensitive level 3 represents a maximum floor life time of 168h absolute maximum ratings
page 6 ams datasheet document feedback [v2-03] 2014-jul-31 AS5050A ? electrical characteristics operating conditions figure 6: operating conditions system parameters figure 7: system parameters symbol parameter conditions min max units vdd dc supply voltage 3.0 3.6 v vddp peripheral supply voltage 1.8 vdd v v in input pin voltage -0.3 vddp +0.3 v t amb ambient operating temperature -40 85 c external components power supply filter, pin vdd (see power supply filter on page 10 ) 2.2 4.7 f 15 33 ceramic capacitor, pin vddp to vss 100 nf symbol parameter conditions min typ max units i on current consumption normal operating mode 8.5 ma i off current consumption low power mode with activated por (por_off = 0x00) C default setting 33 a low power mode with deactivated por (por_off = 0x5a) 3a t readout readout rate time between read angle command and interrupt 500 s t pwrup power up time minimum time after power up before the sensor is operational 580 s r d lateral displacement range misalignment of the center of the magnet to the center of the die 0.5 mm b z magnetic input field 30 90 mt b z00 magnetic input field range gain = 00 58 90 mt electrical characteristics
ams datasheet page 7 [v2-03] 2014-jul-31 document feedback AS5050A ? electrical characteristics dc/ac characteristics digital pads: miso, mosi, sck, ss/, en_int/, int/, wm figure 8: dc/ac characteristics b z01 magnetic input field range gain = 01 51 80 mt b z10 magnetic input field range gain = 10 39 62 mt b z11 magnetic input field range gain = 11 30 47 mt n 00 noise (rms) within b z00 magnetic input field range and gain = 00 0.128 deg rms n 01 noise (rms) within b z01 magnetic input field range and gain = 01 0.149 deg rms n 10 noise (rms) within b z10 magnetic input field range and gain = 10 0.192 deg rms n 11 noise (rms) within b z11 magnetic input field range and gain = 11 0.256 deg rms inl integral non linearity using bomatec 6x2.5 mm ndfeb magnet with a maximum x/y-displacement radius of 250 m from package center -1.41 1.41 deg r pu/pd recommended pull-up or pull-down resistor applicable for daisy chain configuration 10k 50k symbol parameter conditions min max units v ih high level input voltage 0.7 * vddp v v il low level input voltage vddp > 2.7v 0.3 * vddp v v il low level input voltage vddp < 2.7v 0.25 * vddp v i leak input leakage current 1 a v oh high level output voltage vddp - 0.5 v v ol low level output voltage vss + 0.4 v c l capacitive load 35 pf symbol parameter conditions min typ max units
page 8 ams datasheet document feedback [v2-03] 2014-jul-31 AS5050A ? detailed description noise performance this figure shows the worst ca se noise performance of the AS5050A at different gain settings which can be set in the gain register. figure 9: worst case noise performance of the AS5050A detailed description rms noise [degrees] 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0 102030405060708090100 n 11 n 10 n 01 n 00 bz [mt]
ams datasheet page 9 [v2-03] 2014-jul-31 document feedback AS5050A ? detailed description typical application the AS5050A uses on-chip hall elements to convert the magnetic field component perpendicular to the surface of the chip into a voltage. the signals from the hall elements are amplified and filtered by the analog front-end (afe) before being converted by the analog-to-digital converter (adc). the output of the adc is processed by the hardwired cordic (coordinate rotating digital computer) block to compute the angle and magnitude of the magnetic vector. the in tensity of the magnetic field (magnitude) is used by the automatic gain control (agc) to adjust the amplification level for compensation of temperature and magnetic field variations. the internal 10-bit resolution is available by reading a register through the spi interface. the ic settings in the AS5050A can be programmed through the spi interface without any dedicated programmer. figure 10: typical application using spi 4-wire mode and int/ output figure 10 shows how the AS5050A can be connected to a microcontroller. the spi interface is a slave interface for accessing the on-chip registers. the int/ output is an active-low interrupt for informing the host microcontroller when a new result is available. adc AS5050A vdd vss ss/ mosi sck miso analog front-end atan (cordic) agc int/ en_int/ hall sensors low power management vddp wm spi test c 4.7f 15 r dc 3.0v ? 3.6v dc 1.8v ? 3.6v spi interface interrupt 100nf
page 10 ams datasheet document feedback [v2-03] 2014-jul-31 AS5050A ? detailed description power supply filter due to the sequential internal sampling of the hall sensors, fluctuations on the analog power supply (pin#12: vdd) may cause additional jitter of the meas ured angle. this jitter can be avoided by providing a stable vdd supply. the easiest way to achieve that is to add a rc filter: 15 in series and 4.7f to ground as shown in figure 10 . alternatively, a filter: 33 + 2.2f may be used. however with this configuration, the mini mum supply voltage is 3.15v. reading an angle sending a read angle command through the spi interface automatically powers up the chip , drives int/ high and starts another angle measurement. the completion of the angle measurement is indicated by dr iving the int/ output low and clearing the wow flag in the error status register. the microcontroller can respond to the interrupt by reading the angle value from the AS5050A over the spi interface. (see figure 11 ). a read angle command must not be sent while a measurement is being performed as indicated by int/ driven high or wow = 1. reducing the angle jitter the chip only performs a single angle measurement after a read angle command is received, after which it returns to low-power mode, so it is in no rmal operating mode for only a very short time (t pwrup ). the angle jitter can be reduced by averaging several angle measurements in the microcontroller. for example, an averaging of four samples reduces the jitter by 6db (50%). operating modes after a read angle command is sent, the angle is measured and internal calculations are started. during this time (normal operating mode) the int/ output is high until the device finishes the calculations and a second read angle command may not be sent. after the int/ output is driven low the device goes into low-power mode. if the microcontroller doesn't monitor the int/ output a minimum guard time (t readout ) must be inserted before the next read angle command can be sent. after startup the AS5050A has higher power consumption than during low-power mode. when th e por cell is deactivated the chip uses less current during low-power mode (see por off register).
ams datasheet page 11 [v2-03] 2014-jul-31 document feedback AS5050A ? detailed description figure 11: operating modes note(s) and/or footnote(s): 1. even in low power mode, the power supply must be capable of supporting the active current (i on ) at least for maximum t readout , until the AS5050A is suspended to low power mode. daisy chain the AS5050A allows a daisy chain configuration as shown in figure 21 . in this configuration the micr ocontroller can read multiple AS5050A chips using only 5 wires. read angle read angle mosi cs/ int/ normal operating mode communication mode low power mode communication mode operating mode t readout
page 12 ams datasheet document feedback [v2-03] 2014-jul-31 AS5050A ? spi interface the 16-bit spi interface provides read/write access to the on-chip registers. the interface only supports slave operation mode. it communicates at clock rates up to 10 mhz. the AS5050A spi uses mode=1 (cpol=0, cpha=1) to exchange data. as shown in figure 12 , a data transfer starts with the falling edge of csn (scl is low). the AS5050A samples the mosi input on the falling edge of scl. spi commands are executed at the end of the frame (rising edge of csn). the bit order is msb first. data is protected by parity. spi timing figure 12: spi timing diagram spi interface csn (input) clk (input) mosi (input) miso (output) t clk t l t mosi t miso t oz t oz t h t csn t clkl t clkh data[15] data[15] data[14] data[14] data[0] data[0]
ams datasheet page 13 [v2-03] 2014-jul-31 document feedback AS5050A ? spi interface figure 13: spi timing note(s) and/or footnote(s): 1. if the previous command was a read angle command (0x3fff) a mi nimum time of readout has to be waited before sending a next read angle command. (see operating modes on page 10 ) spi wire mode selection the spi interface can be set in tw o different modes: 3-wire mode or 4-wire mode. figure 14: wire mode selection parameter description min max unit t l time between csn falling edge and clk rising edge 50 ns t clk serial clock period 100 ns t clkl low period of serial clock 50 ns t clkh high period of serial clock 50 ns t h time between last falling edge of clk and rising edge of csn 50 ns t csn high time of csn between two transmissions (1) 50 ns t mosi data input valid to falling clock edge 20 ns t miso clk edge to data output valid 35 ns t oz release bus time after cs rising edge. 50 ns wm (pin 14) connection option 03-wire mode 14-wire-mode
page 14 ams datasheet document feedback [v2-03] 2014-jul-31 AS5050A ? spi interface spi transaction an spi transaction consists of a 16-bit command frame followed by a 16-bit data frame. figure 15 shows the structure of the command frame. spi command frame figure 15: spi command frame to increase the reliability of communication over the spi, an even parity bit (par) must be generated and sent. a wrong setting of the parity bit causes th e parity bit in the error status register of the AS5050A to be set. the parity bit is calculated from the upper 15-bits of the command frame. the 16-bit command specifies the address an d whether the transaction is a read or a write. bit 15 1413121110987654321 0 r/w address 14:1 par bit name description 15 r/w 0=write, 1=read 14:1 address 14 bit address to read or write 0 par parity bit (even) calculated on the upper 15 bits
ams datasheet page 15 [v2-03] 2014-jul-31 document feedback AS5050A ? spi interface spi read data frame figure 16: spi read data frame the data is sent from the as5050 a to the microcontroller on the miso output. the parity bit par is calculated for the upper 15 bits. if an error is detected in the previous spi command frame, the ef bit is set. the addressed re gister is sampled on the rising edge of csn and the data is transmitted on miso with the next read command, as shown in figure 17 . figure 17: spi read bit 15 1413121110987654321 0 data 15:2 ef par bit name description 15:2 data 14 bit read data 1 ef 0 = no command frame error occurred, 1 = error occurred 0 par parity bit (even) calculated on the upper 15 bits read add[n] read add[k] csn read add[p] data add[n] data add[p] read add[m] data add[k] command command command command data data data mosi miso
page 16 ams datasheet document feedback [v2-03] 2014-jul-31 AS5050A ? spi interface spi write data frame figure 18: spi write data frame the parity bit par is calculated for the upper 15 bits. in a spi write transaction, the write command frame (e.g. write add[n]) is followed by a data frame (e.g. data [x]). in addition to writing an address in the AS5050A, a write command frame causes the old contents of the addressed register (e.g. data [y]) to be sent on miso in the follow ing frame. this is followed by the new contents of the addressed register (data [x]) as shown in figure 19 . figure 19: spi write transaction bit 15 1413121110987654321 0 data 15:2 dc par bit name description 15:2 data 14 bit write data 1 dc dont care 0 par parity bit (even) calculated on the upper 15 bits write add[n] data(x) csn write add[m] data add[n] data add[m] data(x) command command data to write into add[n] data content add[n] data content add[m] new data content of add[n] mosi miso data(y) data to write into add[m] next command command data(y) new data content of add[m]
ams datasheet page 17 [v2-03] 2014-jul-31 document feedback AS5050A ? spi interface spi connection to the microcontroller figure 20: single slave mode c AS5050A mosi miso sck ss/ int/ mosi miso sck ss/ int/ wire mode c AS5050A 4 wire mode miso angle 1 angle 2 angle 3 mosi 0xffff read angle 1 0xffff read angle 2 0xffff read angle 3 0xffff read angle 4 ss/ miso ss/ 3 wire mode (read only) angle 1 angle 2 angle 3 1 mosi miso sck ss/ int/ wire mode 0xffff mosi miso sck ss/ int/ 1 c AS5050A miso ss/ 3 wire mode (bi-directional) 0xffff read angle 1 angle 1 0xffff read angle 2 angle 2 mosi miso sck ss/ int/ wire mode mosi miso sck ss/ int/ 0 int/ int/ int/
page 18 ams datasheet document feedback [v2-03] 2014-jul-31 AS5050A ? spi interface daisy chain, 4 wire figure 21: daisy chain, 4 wire c AS5050A 1 int/ mosi miso sck ss/ mosi miso sck ss/ wire mode en_int/ AS5050A 2 mosi miso sck ss/ wire mode en_int/ AS5050A 3 mosi miso sck ss/ wire mode en_int/ 1 0 1 1 int/ int/ int/ miso mosi 0xffff read angle 3 0xffff read angle 2 0xffff read angle 1 ss/ angle 3 angle 2 angle 1 0xffff read angle 3 0xffff read angle 2 0xffff read angle 1 int/
ams datasheet page 19 [v2-03] 2014-jul-31 document feedback AS5050A ? registers the on-chip registers are shown in figure 22 . figure 22: registers por off (0x3f22) writing the value 0x5a to the por off register (0x3f22) deactivates the por cell and reduces the current consumption in low power mode (i off ). software reset (0x3c00) writing to the software reset register initiates a software reset. with the res spi bit of th e data package set to 1 it is possible to reset the spi register s. after a software reset a new angle conversion is started; this is needed to set the AS5050A into an initial state. this angle is not readable by the microcontroller. the AS5050A is ready as soon as int/ is driven low or a minimum time (t readout ) has elapsed. figure 23: software reset command name address bits mod default description por off 0x3f22 7:0 r/w 0x0000 power on reset off software reset 0x3c00 13:0 w 0x0000 software reset master reset 0x33a5 13:0 w 0x0000 master reset clear ef 0x3380 13:0 r 0x0000 clear error flag nop 0x0000 13:0 w 0x0000 no operation agc 0x3ff8 5:0 r/w 0x0020 automatic gain control angular data 0x3fff 13:0 r 0x0000 measured angle error status 0x335a 13:0 r 0x0000 error status register system config 0x3f20 9:13 r 0x000 system configuration register 1 bit 151413121110 9 8 7 6 5 4 3 2 1 0 content011110 0000000 0dcpar registers
page 20 ams datasheet document feedback [v2-03] 2014-jul-31 AS5050A ? registers figure 24: data package master reset (0x33a5) writing to the master reset regi ster initiates a master reset. this is similar to the software reset with the difference that no data package is needed. figure 25: master reset command clear error flag (0x3380) reading from the clear error flag register clears the error flag which is contained in every read data frame. the read data is 0x0000 which indicates a successful clear command. figure 26: clear error flag command bit151413121110 9 8 76 5 4 3 2 1 0 dc res spi dc par bit name description 15:3 dc dont care 2 res spi if set to 1 the spi registers are reset as well 1 dc dont care 0 par parity bit (even) calculated on the upper 15 bits bit 151413121110 9 8 7 6 5 4 3 2 1 0 content011001 1101001 0 1 par bit 151413121110 9 8 7 6 5 4 3 2 1 0 content111001 1100000 0 0 par
ams datasheet page 21 [v2-03] 2014-jul-31 document feedback AS5050A ? registers possible conditions which force the error flag to be set: ? wrong parity ? wrong command ? wrong number of clocks note(s): if the error flag is set to 1 because of a communication problem the flag remains set until a clear error flag command is executed. no operation (0x0000) the no operation (nop) command represents a dummy write to the AS5050A. if no error happens the chip responds with 0x0000. figure 27: nop command agc C automatic gain control (0x3ff8) writing a value different than zero to this register, stops the agc loop and keeps a constant agc value. figure 28: agc angular data (0x3fff) figure 29: angular data bit 151413121110 9 8 7 6 5 4 3 2 1 0 content000000 0000000 0 0 par name read/write bit position description agc r/w 5:0 automatic gain control value name read/write bit position description alarm lo r 13 alarm flag, which indicates a too low magnetic field alarm hi r 12 alarm flag, which indicates a too high magnetic field angle value r 9:0 angular value in 10 bit binary code
page 22 ams datasheet document feedback [v2-03] 2014-jul-31 AS5050A ? error monitoring alarm bits figure 30: alarm bits error status (0x335a) for detailed information of the er ror status register please refer to error monitoring on page 22 . system configuration register 1 (0x3f20) figure 31: system configuration register the correct operation and communication of the AS5050A is ensured by several error flags. every read access is supported by a communication error flag (ef) to indicate a transmission error in a previous host transmission. for additional information on th e error status, please refer to the application note an5000_errormonitoring. alarm hi alarm lo description 00 agc level is higher than the minimum value and lower than the maximum value. 01 agc level is equal or even lower than the minimum level. magnetic field is too weak. 10 agc level is equal or even higher than the maximum level. magnetic field is too strong. 11 indicates if a major system error has occurred during the last read angle command or if the wow flag is act ive. during active wow a read angle command must not be sent. error flags can be read out with the error status register. name read/write bit position description resolution r 13:12 01 indicates 10 bit resolution chip id r 11:9 silicon version 010 gain r 4:3 sets gain setting error monitoring
ams datasheet page 23 [v2-03] 2014-jul-31 document feedback AS5050A ? error monitoring error status register figure 32: error status register and description bit type description error status dsp 13 reserved 12 field_alarm_lo agc level is equal or even higher than the maximum level. magnetic field is too weak. 11 field_alarm_hi agc level is equal or even lower than the minimum level. magnetic field is too strong. 10 range the range flag signals that the hall bias circuit has reached the head room limit. this might occur at the combination of low supply voltage, high temperature and low magnetic field. in this case, manually reducing the agc setting ( figure 28 ) can be used to recover a valid hall biasing condition. 9cordicov the cordic calculates the angle. an error occurs when the input signals of the cordic are too large. the internal algorithm fails. 8adcov the adcov bit occurs if the magnetic in put field strength is too large for at least one hall element. this can be the ca se if the magnet is displaced. second reason could be that the offset compensation after power up is not finished yet. if this happens some dummy re ad angle commands may be sent to settle the offset loop. error status system 7reserved 6reserved 5reserved 4wow when a read angle command is in progress, the wow flag is set to 1. at the end of the measurement the wow flag is cleared to 0. only in case of deadlock the wow flag is stuck high; in which case a master reset must be sent to clear the deadlock. error status spi 3reserved 2 addmon set to high when non existing address is used. 1 clkmon set to high when the amount of clock cycles is not correct. 0parity set to high when the transmitted parity bit does not match to calculated parity bit.
page 24 ams datasheet document feedback [v2-03] 2014-jul-31 AS5050A ? package drawings & markings the device is available in a 16-pin qfn (4x4x0.9 mm) package. the axis of the magnet must be aligned over the center of the package. figure 33: package fn C dual flat no-l ead packaging configuration note(s) and/or footnote(s): 1. dimensions and tolerancing conform to asme y14.5m-1994 . 2. all dimensions are in millimeters. angles are in degrees. 3. dimension b applies to meta llized terminal and is measured between 0.25mm and 0.30mm from terminal tip. dimension l1 represents terminal full back from package edge up to 0.15mm is acceptable. 4. coplanarity applies to the exposed heat slug as well as the terminal. 5. radius on terminal is optional. 6. n is the total number of terminals. package drawings & markings symbol min nom max a 0.80 0.90 1.00 a1 0 0.02 0.05 a3 0.20 ref l 0.35 0.40 0.45 l1 0 - 0.15 b 0.25 0.30 0.35 d4.00 bsc e4.00 bsc e0.65 bsc d2 2.60 2.70 2.80 e2 2.60 2.70 2.80 aaa - 0.15 - bbb - 0.10 - ccc - 0.10 - ddd - 0.05 - eee - 0.08 - fff - 0.10 - n16 asxxxx @ yywwxzz green rohs
ams datasheet page 25 [v2-03] 2014-jul-31 document feedback AS5050A ? package drawings & markings figure 34: marking: yywwxzz figure 35: vertical cross section of qfn 16-pin 4x4x0.85 mm package note(s) and/or footnote(s): 1. all dimensions in mm. 2. die thickness 0.254 0.013 3. adhesive thickness 0.010 10, +0.01, -0.0025 4. lead frame thickness 0.203 typ. yy ww x zz year (i.e. 04 for 2004) week assembly plant identifier assembly traceability code
page 26 ams datasheet document feedback [v2-03] 2014-jul-31 AS5050A ? ordering & contact information figure 36: ordering information buy our products or get free samples online at: www.ams.com/icdirect technical support is available at: www.ams.com/technical-support provide feedback about this document at: www.ams.com/document-feedback for further information and requests, e-mail us at: ams_sales@ams.com for sales offices, distributors and representatives, please visit: www.ams.com/contact headquarters ams ag tobelbaderstrasse 30 8141 unterpremstaetten austria, europe tel: +43 (0) 3136 500 0 website: www.ams.com ordering code package marking delivery form delivery quantity AS5050A-bqft 16-pin qfn AS5050A 13" tape & reel in dry pack 6000 AS5050A-bqfm 16-pin qfn AS5050A 7" tape & reel in dry pack 500 ordering & contact information
ams datasheet page 27 [v2-03] 2014-jul-31 document feedback AS5050A ? rohs compliant & ams green statement rohs: the term rohs compliant means that ams ag products fully comply with current rohs directives. our semiconductor products do not contain any chemicals for all 6 substance categories, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, rohs compliant products are suitable for use in specif ied lead-free processes. ams green (rohs compliant and no sb/br): ams green defines that in addition to rohs compliance, our products are free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material). important information: the information provided in this statement represents ams ag knowledge and belief as of the date that it is provided. ams ag bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are unde rway to better integrate information from third parties. ams ag has taken and continues to take reasonable steps to prov ide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ams ag and ams ag suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. rohs compliant & ams green statement
page 28 ams datasheet document feedback [v2-03] 2014-jul-31 AS5050A ? copyrights & disclaimer copyright ams ag, tobelbader strasse 30, 8141 unterpremstaetten, austria-europe. trademarks registered. all rights reserved. the material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. devices sold by ams ag are covered by the warranty and patent indemnification provisions appe aring in its general terms of trade. ams ag makes no warranty, express, statutory, implied, or by description regarding th e information set forth herein. ams ag reserves the right to ch ange specifications and prices at any time and without notice. therefore, prior to designing this product into a system, it is necessary to check with ams ag for current information. this product is intended for use in commercial applications. applications requiring extended temperature range, unusual environmental requirements, or high reliability applications , such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by ams ag for each application. this product is provided by ams ag as is and any express or implied wa rranties, including, but not limited to the implied warranties of merchantability and fitness for a particular purpose are disclaimed. ams ag shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. no obligation or liability to recipient or any th ird party shall arise or flow out of ams ag rendering of technical or other services. copyrights & disclaimer
ams datasheet page 29 [v2-03] 2014-jul-31 document feedback AS5050A ? document status document status product status definition product preview pre-development information in this datasheet is based on product ideas in the planning phase of development. all specifications are design goals without any warranty and are subject to change without notice preliminary datasheet pre-production information in this datasheet is based on products in the design, validation or qualif ication phase of development. the performance and parameters shown in this document are preliminary without any warranty and are subject to change without notice datasheet production information in this datashee t is based on products in ramp-up to full production or full production which conform to specifications in accordance with the terms of ams ag standard warranty as given in the general terms of trade datasheet (discontinued) discontinued information in this datasheet is based on products which conform to specifications in accordance with the terms of ams ag standard warranty as given in the general terms of trade, but these products have been superseded and should not be used for new designs document status
page 30 ams datasheet document feedback [v2-03] 2014-jul-31 AS5050A ? revision information note(s) and/or footnote(s): 1. page numbers for the previous version may di ffer from page numbers in the current revision changes from 2-02 (2014-jul-02) to current revision 2-03 (2014-jul-31) page (1) updated figure 13 13 updated figure 30 22 updated figure 32 23 revision information
ams datasheet page 31 [v2-03] 2014-jul-31 document feedback AS5050A ? content guide 1 general description 1 key benefits & features 2 applications 2 block diagram 3 pin assignment 5absolute maximum ratings 6 electrical characteristics 6 operating conditions 6 system parameters 7 dc/ac characteristics 8 detailed description 8 noise performance 9 typical application 10 power supply filter 10 reading an angle 10 reducing the angle jitter 10 operating modes 11 daisy chain 12 spi interface 12 spi timing 13 spi wire mode selection 14 spi transaction 14 spi command frame 15 spi read data frame 16 spi write data frame 17 spi connection to the microcontroller 18 daisy chain, 4 wire 19 registers 19 por off (0x3f22) 19 software reset (0x3c00) 20 master reset (0x33a5) 20 clear error flag (0x3380) 21 no operation (0x0000) 21 agc C automatic gain control (0x3ff8) 21 angular data (0x3fff) 22 alarm bits 22 error status (0x335a) 22 system configuration register 1 (0x3f20) 22 error monitoring 23 error status register 24 package drawings & markings 26 ordering & contact information 27 rohs compliant & ams green statement 28 copyrights & disclaimer 29 document status 30 revision information content guide

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	To Download AS5050A Datasheet File
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